1. Field of Invention
The present invention relates to an A/D converter. More particularly, the present invention relates to an A/D converter with a pipelined architecture.
2. Description of Related Art
Analog-to-digital converters (also called A/D converters or ADCs) are common construction blocks of electronic systems which process physical signals from transducers, electronic signal generating circuits, etc. For a conventional pipelined A/D converter, it has a number of stages of A/D converting units, each of which includes a multiplying D/A converter (MDAC) containing sampling capacitors and an OP amplifier. However, nonlinearities are usually caused by finite gain error and settling error of the OP amplifier or capacitor mismatch error, thus affecting quality of the digital output signal generated from the pipelined AND converter. Thus, it is desired to reduce the non-linearity and increase the linearity of the pipelined A/D converter.